Article

Six capacitor design takeaways for power supply engineers

Nishant Nishant
A printed circuit board showing power components
Capacitors are a critical passive component in power supply design, but their behavior is design-dependent.
KEY TAKEAWAYS:
  • Why capacitor values should be for guidance only
  • How to handle Equivalent Series Resistance (ESR) and Equivalent Series Inductance (ESL)  
  • Ignore ripple current ratings at your own risk
  • There’s a capacitor that’s right for your application, and some that are wrong

Passive components are the workhorses of every power supply, with capacitors playing a critical role. A capacitor smooths ripples, stores energy for transient loads, decouples noise and keeps control loops stable.

A poorly chosen or badly placed capacitor can derail power supply designs faster than any component choice. Capacitance is the leading number on a datasheet but is perhaps the least relevant parameter engineers need to consider.

With respect to capacitors, the following six considerations apply to any type of power supply from a point-of-load buck converter to a bulk rectifier front end or a low-noise low-dropout (LDO) regulator. Reviewing these six factors could ensure power supplies that run on the bench don’t fail in the field.
 

Why are capacitor values only best-case?

Perhaps the most important consideration (and one that every engineer learns and never forgets) is that the capacitance on the device is a nominal figure. It is the best-case value you can expect to get, but one that is typically measured under ideal and controlled conditions. In practice, that could be using a small AC signal at 1 kHz with no DC bias and at 25°C. The reality is your application will not match those conditions.

The standout example here is the multi-layer ceramic capacitor (MLCC), specifically Class II dielectrics such as X5R and X7R. Because of the phenomenon known as DC bias derating, the effective capacitance of MLCCs drops when a DC voltage is applied across them. A 10 µF capacitor with a small case (such as X5R) rated at 6.3 V could drop to below 4 µF when operated at 5 V. For high-density small-case parts, a capacitance reduction of 70% is possible when operated near their rated voltage.

In this example, use a 16V X7R MLCC for a 5V application. Keeping the capacitor’s rated voltage two to three times the operating voltage will mitigate the DC bias effect and provide an additional 20% to 40% margin.

Read about recent developments and advancements in tackling DC bias derating in the accompanying article: “DC bias derating in multi-level ceramic capacitors is a focus area for suppliers.”

In addition to DC bias effects, Class II ceramics also age. Expect capacitance to fall gradually over time, as the dielectric structure relaxes after manufacture or reflow. Aging is usually specified as a percentage loss per decade of hours, and it should be considered alongside DC bias and temperature when estimating the usable capacitance in a circuit.

The design takeaway here is not to base design decisions solely on the capacitor’s “out-of-the-box” value. Design teams should always derate for temperature but also consult the manufacturer’s datasheet for capacitance versus DC bias curves and then also compensate for tolerance and aging.

Selecting a higher voltage rating and larger case size when using Class II MLCCs can improve the effective capacitance seen in operation. But the right margin depends on the dielectric, package and supplier data. For manganese dioxide (MnO2) tantalum capacitors, a 2:1 voltage derating is commonly used.

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Is equivalent series resistance important?

Although capacitors are rated in farads, not ohms, every capacitor has an equivalent series resistance (ESR) rating. This is the sum of the resistive losses in the plates, leads and the dielectric.

The ESR matters for two reasons. First, when time-varying current flows through a bulk or output capacitor, the voltage developed across the ESR appears as ripple. Adding more capacitance doesn’t remove the output ripple voltage; it’s something designers need to deal with in other ways. In switching power supplies the ripple isn’t dominated by the output capacitance, but by the ripple voltage created by Iripple x ESR.

The capacitor’s composition also influences ESR. Ceramic capacitors have an ESR in the low milliohm-level, while polymer and tantalum-polymer parts are also low and stable. Aluminum electrolytics can have an ESR in the hundreds of milliohms at low temperatures, but it falls as it heats up. This highlights the other important consideration: any internal resistance will convert ripple current into heat (P=I2rms x ESR). Raising the internal temperature of the capacitor shortens its operational life.

It’s also relevant to mention that some LDOs and controllers need some ESR at the output for loop stability. In this design scenario, swapping an electrolytic for a low-ESR ceramic could cause oscillation.

The design takeaway is knowing that a capacitor’s ESR is not related to its capacitance and can’t be removed by adding more capacitance. But in some cases, a lower ESR could be destabilizing. The article, “Capacitor manufacturers are reacting to changing demand for lower ESR,” takes a deeper dive into how suppliers are addressing the unwanted effects of ESR.

 

What do engineers need to know about equivalent series inductance?

Above a certain frequency, a capacitor starts to exhibit inductor-like qualities. This is referred to as equivalent series inductance (ESL) and caused by the magnetic fields generated by time-varying current passing through the capacitor’s leads and terminations, and the PCB’s tracks. Together with the capacitance, ESL forms a series resonant circuit which, like any circuit with capacitance and inductance, has a self-resonant frequency (SRF).

Below the SRF, the part is capacitive and its impedance falls with frequency, as expected. At the SRF the impedance reaches its minimum (limited only by ESR). Above the SRF the part is inductive and its impedance increases as the frequency goes up. This means a large-value capacitor will be less useful at high frequencies, which might be precisely where you need it for decoupling fast switching edges.

The design takeaway here is that while datasheets include the self-resonance frequency of a capacitor, the loop inductance formed by PCB traces will shift that. Engineering teams should design for loop geometry, use small packages in parallel arrays and select capacitor values with self-resonance in mind. To read about recent supplier developments in ESL and self-resonance, take a look at this companion article: “Reducing ESL in power distribution networks.”

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Why ripple current is the main lifetime limitation for electrolytics

Bulk and output capacitors in DC rectifiers must handle constant AC ripple current, absorbing and releasing energy from load transients and switching ripple. Because this causes self-heating, manufacturers give capacitors a maximum RMS ripple current rating. Exceeding this maximum causes self-heating to degrade the component, leading to premature failure caused by venting or dry-out in electrolytics.

The ripple current rating is only a guide. Actual limitations depend on the application and factors such as frequency, ambient and case temperature, airflow, mounting conditions and the allowable internal temperature rise. Any component may need significant derating when used under different operating conditions, especially at low ripple frequencies or in hot, enclosed designs.

For aluminum electrolytics, ripple current heating is the single largest driver of the Arrhenius equation. This is a generalization that states a capacitor’s life roughly halves for every 10°C increase in core temperature (or doubles for a 10°C decrease from the datasheet figure). Underrating the ripple current is a direct route to field failures years down the line.

The design takeaway here is to calculate the actual RMS ripple current your capacitor will see, apply the manufacturer's frequency and temperature derating, and choose parts (or parallel banks) with comfortable margin. Paralleling capacitors shares the current and lowers the heat in each. Take a closer look at ripple current in this article: “Capacitor innovations helping engineers manage ripple current effects.”

 

How is dielectric technology developing?

There is no single capacitor that can do everything. Each type is based on a specific dielectric, which dictates where it fits in the design toolbox, in terms of capacitance density, voltage, ESR, temperature stability, cost and failure mode.

  • Ceramic (MLCC): Tiny, cheap, very low ESR/ESL, excellent at high frequency. But Class II types suffer heavy DC bias derating, aging, and can crack mechanically or produce piezoelectric noise. Class I (C0G/NP0) is ultra-stable but low capacitance.
  • Aluminum electrolytic: High capacitance per unit cost, ideal for bulk energy storage. But high ESR, limited life (electrolyte dry-out), poor cold performance and wear-out failure.
  • Aluminum/tantalum polymer: Low and stable ESR, long life, good ripple handling. More expensive; polymers can be higher leakage.
  • Tantalum (MnO2): Stable high capacitance in small volume, but notorious for short-circuit failure and inrush sensitivity. They usually require voltage derating of 2:1 or more.
  • Film: Excellent stability, low loss, self-healing behavior and strong ripple-current capability. Bulky and costly compared with ceramics and electrolytics, so they are often favored in high-voltage, high-reliability or high-pulse-current applications.

The design takeaway is to match the technology to the job. Bulk storage, high-frequency decoupling and loop compensation each have different ideal dielectrics, and most supplies use a mix. The article, “How dielectric innovation is reshaping capacitor selection for high-power designs,” looks at the research and development capacitor suppliers are doing around dielectrics and where those developments can improve specific product offerings.

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How to combat placement, layout and failure modes

The right capacitor can still be the wrong design decision if it is placed badly. Parasitic inductance is largely related to PCB copper, and placement and layout are defined by the size and shape of the capacitor, which means they are inseparable from capacitor selection.

The design takeaway is to treat the capacitor, its footprint and its surrounding copper as a single component. Here are some additional tips:

  • Decoupling capacitors should be as close as physically possible to the IC power pins, with short, wide traces and multiple vias to minimize loop inductance.
  • Keep high di/dt switching-loop capacitors, such as the input capacitor of a buck converter, as close as possible to the VIN and power-ground pins of the switching stage. The goal is to minimize the VIN to high-side FET to low-side FET to GND ‘hot-loop’ area. Locating it over a ground plane and making it as compact as possible can mitigate what is a major source of noise and EMI.
  • Locate CIN and COUT near the power devices and their negative terminals co-located. This keeps return paths short and reduces common impedance coupling.
  • Design for the failure mode you can tolerate: electrolytics tend to fail open/degrade, tantalums can fail short (a fire risk) and ceramics can crack. On safety-critical rails, this choice matters as much as any electrical spec.

Buck converters, regulators, power management integrated circuits (PMICs), point-of-loads or high current multiphase power management systems often use a half-bridge configuration using N-channel metal oxide semiconductor field effect transistors (MOSFETs) for the high-side and low-side switches. These topologies can be realized using either discrete components or modules. In both cases, using the top or bottom PCB layers is the most effective way of placing decoupling capacitors across the half-bridge, with the positive terminal on the drain of the uppermost field-effect transistor (FET) and the negative terminal on the source of the lowermost FET.
 

Conclusion

Designing power supplies well means treating capacitors as the complex, frequency-dependent, temperature-sensitive, aging components they really are, and not as ideal boxes of stored charge.

Understand that the marked capacitance is optimistic, that ESR and ESL govern real-world ripple and high-frequency behavior, that ripple current sets lifetime, that dielectric choice is a system tradeoff, and that layout is inseparable from selection.

Get those six things right, and the supply will be quiet, cool, stable and reliable long after it leaves the bench.

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Nishant Nishant
Avnet Staff

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