MC9S12XDP512CAG

The MC9S12XDP512CAG is a 16-bit Microcontroller based on enhanced HCS12X CPU (40MHz bus) with CISC architecture operates at a maximum frequency of 80MHz. The device incorporates 512kB internal flash, 32kB internal RAM, 4kB EEPROM, 24-channel 10-bit A/D converter and 119 general-purpose I/O pins. This device also features peripherals like two inter-integrated circuit (IIC) bus module, two multi-scalable controller area networks (MSCAN) CAN 2.0 A/B software compatible modules, six serial communications interface (SCI) and three serial peripheral interface modules (SPI). The MC9S12XD family features the performance boosting XGATE co-processor. The XGATE, which is programmable in C language, has an instruction set which is optimized for data movement, logic and bit manipulation instructions. It runs at twice the bus frequency of the S12X and off-loads the CPU by providing high speed data transfer between any peripheral module, RAM and I/O ports.

• Upward compatible with MC9S12 instruction set
• Interrupt stacking and programmer’s model identical to MC9S12
• Instruction queue
• Enhanced indexed addressing
• Enhanced instruction set
• External bus interface (EBI)
• Module mapping control (MMC)
• Interrupt controller (INT)
• Debug module to monitor HCS12X CPU and XGATE bus activity
• Background debug mode (BDM)