EV12DS130AGS-EB

The EV10AS180A is a 10-bit 1.5 GSps ADC. The device includes a front-end Track and Hold stage (T/H), followed by an analog encoding stage (Analog Quantizer) which outputs analog residues resulting from analog quantization. Successive banks of latches regenerate the analog residues into logical levels before entering an error correction circuitry and a resynchronization stage followed by a DEMUX with 100 Ohm differential output buffers.

The EV12DS130AGS-EB evaluation board is designed to facilitate the evaluation and characterization of the EV12DS130A 12-bit DAC with 4/2:1 MUX in fpBGA package. The EV12DS130AGS evaluation board is very straightforward as it implements e2v EV12DS130A 12-bit MUXDAC device, ALTERA FPGA STRATIX II EP2S60F672C5N, SMA connectors for the sampling clock, analog outputs and reset inputs accesses. Thanks to its user-friendly interface, the EV12DS130AGS-EB Kit enables to test all the functions of the EV12DS130A 12-bit MUXDAC.