AT25DF321A-MH-T

The AT25DF321A is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the AT25DF321A, with its erase granularity as small as 4-Kbytes, makes it ideal for data storage as well, eliminating the need for additional data storage EEPROM devices.The physical sectoring and the erase block sizes of the AT25DF321A have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the physical sectors and erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own protected sectors, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density.The AT25DF321A also offers a sophisticated method for protecting individual sectors against erroneous or malicious program and erase operations. By providing the ability to individually protect and unprotect sectors, a system can unprotect a specific sector to modify its contents while keeping the remaining sectors of the memory array securely protected. This is useful in applications where program code is patched or updated on a subroutine or module basis, or in applications where data storage segments need to be modified without running the risk of errant modifications to the program code segments. In addition to individual sector protection capabilities, the AT25DF321A incorporates Global Protect and Global Unprotect features that allow the entire memory array to be either protected or unprotected all at once. This reduces overhead during the manufacturing process si

• Single 2.7V - 3.6V Supply
• Serial Peripheral Interface (SPI) Compatible
  • Supports SPI Modes 0 and 3
  • Supports RapidS Operation
  • Supports Dual-Input Program and Dual-Output Read
• Very High Operating Frequencies
  • 100MHz for RapidS
  • 85MHz for SPI
  • Clock-to-Output (tV) of 5ns Maximum
• Flexible, Optimized Erase Architecture for Code + Data Storage Applications
  • Uniform 4-Kbyte Block Erase
  • Uniform 32-Kbyte Block Erase
  • Uniform 64-Kbyte Block Erase
  • Full Chip Erase
• Individual Sector Protection with Global Protect/Unprotect Feature
  • 64 Sectors of 64-Kbytes Each
• Hardware Controlled Locking of Protected Sectors via WP Pin
• Sector Lockdown
  • Make Any Combination of 64-Kbyte Sectors Permanently Read-Only
• 128-Byte Programmable OTP Security Register
• Flexible Programming
  • Byte/Page Program (1- t