9ZML1256AKILF

9ZML1256AKILF is a 2:12 clock multiplexer for PCIe Gen1–5 and UPI. Each input clock has software adjustable input-to-output delay when operating in Zero-Delay (ZDB) mode. The devices also implement an extensive set of features ensuring that clock is well behaved with today's ever more complex power-up sequencing. This has an SMBus Write Lockout pin for increased device and system security. Typical application includes servers/high-performance computing, nVME storage, networking, accelerators, industrial control.

• 85MHz output impedance, 12 number of clock outputs
• 2:12 ZDB/FOB with SMBus write protection
• 12 low-power HCSL (LP-HCSL) outputs
• Flexible power sequencing (FPS) configuration via SMBus
• Power down tolerant input (PDT); inputs: SEL-A-B#, SADR[1:0]-tri, OE# pins
• Input-to-output delay: 0ps default. Programmable through 360°
• 2 software-configurable input-to-output delay lines
• Dedicated OE# pins support PCIe CLKREQ# function
• Selectable ZDB bandwidths minimizes jitter peaking in cascaded ZDB topologies
• 72pin VFQFPN, operating temperature range from -40°C to +85°C