NCV51200MNTXG
3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4. ONSSPCLDO;
- RoHS 10 Compliant
- Tariff Charges
NCV51200MNTXG is a source/sink double data rate (DDR) termination regulator specifically designed for low input voltage and low noise systems where space is a key consideration. It supports a remote sensing function and all power requirements for DDR VTT bus termination. This can also be used in low-power chipsets and graphics processor cores that require dynamically adjustable output voltages. Applications include DDR memory termination, desktop PC’s, notebooks, and workstations, servers and networking equipment, telecom/datacom, GSM base station, graphics processor core supplies, set top boxes, LCD-TV/PDP-TV, copier/printers, chipset/RAM supplies as low as 0.5V, active bus termination.
- For automotive applications, integrated power MOSFETs
- PVCC voltage range from 1.1 to 3.5V, supports 2.5V, 3.3V and 5V rails input voltage
- PGOOD logic output pin to monitor VTT regulation
- EN logic input pin for shutdown mode, remote sensing (VTTS)
- Reference input allows for flexible input tracking either directly or through resistor divider
- Built in soft start, under voltage lockout and over current limit
- Thermal shutdown
- Supply voltage range from 2.375 to 5.5V, 0.7mA typ supply current (TA = +25°C)
- Output offset voltage range from -15 to +15mV (VRO = 1.25V (DDR1), ITT = 0A)
- DFN10 package, operating junction temperature is 150°C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Surface Mount | ||
| 10 | ||
| -40 to 125 °C | ||
| 125 °C | ||
| -40 °C | ||
| 10 | ||
| 3 A | ||
| DFN | ||
| 5.5 V | ||
| 2.375 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390070 |
| Schedule B: | 8542390060 |