NC7SZ175P6X
Flip-Flop, Non Inverted, Positive Edge, NC7S175, D, 2.6 ns, 175 MHz, 32 mA, SC-70
-
RoHS 10 Compliant -
Tariff Charges
The NC7SZ175P6X is a single positive edge-triggered D-type CMOS Flip-flop with asynchronous clear from Fairchild's ultra-high-speed series of TinyLogic®. The device is fabricated with advanced CMOS technology to achieve ultra-high-speed with high output drive while maintaining low static power dissipation over a very broad VCC operating range. The device is specified to operate over the 1.65 to 5.5V VCC range. The inputs and output are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V independent of VCC operating voltage. This single flip-flop will store the state of the D input that meets the setup and hold time requirements on the low-to-high clock transition. A low input to Clear sets the Q output to low level. The Clear input is independent of clock.
- Power down high impedance inputs/output
- Proprietary noise/EMI reduction circuitry implemented
- Overvoltage tolerant inputs facilitate 5 to 3V translation
- Matches the performance of LCX when operated at 3.3V VCC
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Matte Tin | ||
| TinyLogic UHS | ||
| D-Type | ||
| 260 | ||
| -32 mA | ||
| 5.5@3.3V|4@5V ns | ||
| 0.001 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 1 | ||
| 1 | ||
| 1 | ||
| 1 | ||
| 0 | ||
| -40 to 85 °C | ||
| Single-Ended | ||
| 6SC-70 | ||
| 6 | ||
| Non-Inverting | ||
| 2 x 1.25 x 1 mm | ||
| 50 pF | ||
| No | ||
| Master Reset | ||
| SC-70 | ||
| Positive-Edge | ||
| 1.8|2.5|3.3|5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
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