NB7L11MMNR2G

The NB7L11M is a differential 1-to-2 clock/data distribution chip with internal source termination and CML output structure, optimized for low skew and minimal jitter. The device produces two identical output copies of clock or data operating up to 8 GHz or 12 Gb/s, respectively.Inputs incorporate internal 50 Ohm termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), CML, LVCMOS, LVTTL, or LVDS. Differential 16mA CML (Current Mode Logic) output provides matching 50 Ohm terminations, and 400 mV output swings when externally terminated, 50 Ohm to V.

• Maximum Input Clock up to 8 GHz Typical
• Maximum Input Data Rate up to 12Gb/s Typical
• < 0.5 ps of RMS Clock Jitter
• < 10 ps of Data Dependent Jitter
• 30 ps Typical Rise and Fall Times
• 110 ps Typical Propogation Delay
• 3 ps Typical Within Device Skew
• Operatiing Range: V_CC = 2.375V to 3.465V with V_EE = 0V
• CML Output Level (400 mV Peak-to-Peak Output) Differential Output Only
• 50 O Internal Input and Output Termination Resistors
• Functionally Compatible with Existing 2.5V / 3.3V LVEL,LVEP, EP, and SG DEvices
• Pb-Free Packages are Available