NB3N853531EDTR2G

The NB3N853531E is a low skew 3.3 V supply 2:1:4 clock distribution fanout buffer. An input MUX selects either a Fundamental Parallel Mode Crystal or a LVCMOS/LVTTL Clock by using the CLK_SEL pin (HIGH for Crystal, LOW for Clock) with LVCMOS / LVTTL levels. The single ended CLK input is translated to four LVPECL Outputs.Using the crystal input, the NB3N853531E can be a Clock Generator.A CLK_EN pin can enable or disable the outputs synchronously to eliminate runt pulses using LVCMOS/LVTTL levels (HIGH to enable outputs, LOW to disable output).

• Four Differential LVPECL Outputs
• Selectable Crystal or LVCMOS/LVTTL CLOCK Inputs
• Operating Range: VCC = 3.3 5% V( 3.135 to 3.465 V)
• PbFree TSSOP20 Package
• Up to 266 MHz Clock Operation
• Output to Output Skew: 30 ps (Typ)
• Device to Device Skew 200 ps (Max)
• Propagation Delay 1.8 ns (Max)
• Additive Phase Jitter, RMS: 0.053 ps (Typ.)
• Synchronous Clock Enable Control
• Industrial Temp. Range (-40°C to 85°C)
• These are PbFree Devices
• 10Gigibit Ethernet