NB3N3020DTG
Clock Multiplier, LVPECL / LVCMOS, Programmable, 3.3 V
- RoHS 10 Compliant
- Tariff Charges
The NB3N3020DTG is a low-phase noise selectable Clock Multiplier takes a 5 to 27MHz fundamental mode parallel resonant crystal or a 2 to 210MHz LVCMOS single ended clock source and generates a differential LVPECL output and a single ended LVCMOS/LVTTL output at a selectable clock output frequency which is a multiple of the input clock frequency. Three tri-level (low, mid, high) LVCMOS/LVTTL single ended select pins set one of 26 possible clock multipliers. The LVCMOS/LVTTL output enable (OE1) tri-states the LVCMOS/LVTTL clock output (CLK1) when low. When the LVTTL/LVCMOS output enable (OE2) is LOW, LVPECL CLK2 is forced LOW and LVPECL CLK2 is forced HIGH.
- External loop filter is not required
- LVPECL Differential output
- LVCMOS/LVTTL outputs
- RMS period jitter of 5ps
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Gold | ||
| 265 | ||
| 210 MHz | ||
| 2 MHz | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 1 | ||
| 3.3 V | ||
| -40 to 85 °C | ||
| 210 MHz | ||
| 16TSSOP | ||
| 16 | ||
| 5.1 x 4.5 x 1.05 mm | ||
| No | ||
| Industrial | ||
| TSSOP | ||
| PLL Clock Multiplier |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390070 |
| Schedule B: | 8542390060 |