NB3N108KMNG

The NB3N108K is a differential 1:8 Clock and Data fanout buffer with High-speed Current Steering Logic (HCSL) outputs optimized for ultra low propagation delay variation. The NB3N108K is designed with HCSL clock distribution and FBDIMM applications in mind.

• 0.1 ps Typical RMS Phase Jitter
• Typical Input Clock Frequency 100, 133, 166, or 400 MHz
• 220 ps Typical Rise and Fall Times
• 800 ps Typical Propagation Delay
• tpd 100 ps Maximum Propagation Delay 100 ps Delta tpd Variation Per Each Diff Pair
• Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V
• Differential HCSL Output Levels or LVDS Output Levels with Interface Termination