NB100LVEP221MNRG
Clock / Data Fanout Buffer, 2:1:20 Differential, HSTL / ECL / PECL, 2.5 V / 3.3 V
- RoHS 10 Compliant
- Tariff Charges
The NB100LVEP221 is a low skew 2:1:20 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The two clock inputs are differential ECL/PECL; CLK1/CLK1bar can also receive HSTL signal levels. The LVPECL input signals can be either differential or single-ended (if the V output is used).The LVEP221 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device.To ensure tightest skew, both sides of differential outputs should be terminated identically into 50 ohms even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew.The NB100LVEP221, as with most other ECL devices, can be operated from a positive V supply in LVPECL mode. This allows the LVEP221 to be used for high performance clock distribution in +3.3 V or +2.5 V systems.
- 15 ps Typical Output-to-Output Skew
- 40 ps Typical Device-to-Device Skew
- Jitter Less than 2 ps RMS
- Maximum Frequency > 1.0 Ghz Typical
- VBB Output
- 540 ps Typical Propagation Delay
- LVPECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -2.375 V to -3.8 V
- Q Output will Default Low with Inputs Open or at VEE
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Clock Driver, Fanout Buffer | ||
| QFN-EP | ||
| 1 GHz | ||
| 50 MHz | ||
| ECL, HSTL, PECL | ||
| 2 | ||
| 20 | ||
| 52 | ||
| 85 °C | ||
| -40 °C | ||
| ECL, PECL | ||
| NB100LVEP221 Series | ||
| 3.8 Vdc | ||
| 2.375 Vdc |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390070 |
| Schedule B: | 8542390060 |