MC74HC573ADWR2G
Octal 3-State Non-inverting Transparent Latch. ONSSPCLGC;
The MC74HC573ADWR2G is an octal 3-state noninverting transparent latch in 20 pin WSOIC package. This device is identical in pin-out to LS573. It is compatible with standard CMOS outputs with pull-up resistors it is also compatible with LSTTL outputs. This latch appears transparent to data (outputs change asynchronously) when Latch enable is high. Data meeting the setup and hold time becomes latched when latch enable goes low. The MC74HC573ADWR2G is identical in function to HC373A but has the data inputs on the opposite side of package from outputs to facilitate PC board layout.
- High performance silicon gate CMOS technology
- 15 LSTTL loads output drive capability
- Outputs directly interface to CMOS, NMOS and TTL
- Operating voltage range from 2V to 6V
- Low input current of 1µA
- In compliance with JEDEC standard number 7.0 A requirements
- Chip complexity (218 FETs or 54.5 equivalent gates)
- Input rise and fall time of 1000ns at VCC = 2V
- Maximum quiescent supply current (per package) of 4µA at VCC = 6V
- Operating temperature range from -55°C to 125°C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Transparent | ||
| Matte Tin | ||
| HC | ||
| 260 | ||
| -7.8 mA | ||
| 7.8 mA | ||
| 150@2V|100@3V|30@4.5V|26@6V ns | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 8 | ||
| 1 | ||
| 1 | ||
| 8 | ||
| 1 | ||
| 8 | ||
| 0 | ||
| -55 to 125 °C | ||
| 3-State | ||
| 20SOIC W | ||
| 20 | ||
| Non-Inverting | ||
| 12.95 x 7.6 x 2.4 mm | ||
| 50 pF | ||
| No | ||
| No | ||
| SOIC W | ||
| D-Type |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
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