MC14027BDG
Dual JK Flip Flop
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Manufacturer:onsemi
Product Category:
Logic ICs, Flip Flops
Avnet Manufacturer Part #: MC14027BDG
Secondary Manufacturer Part#: MC14027BDG
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RoHS 10 Compliant -
Tariff Charges
The MC14027BDG is a dual JK Flip-flop has independent J, K, Clock (C), Set (S) and Reset (R) inputs for each flip-flop. It may be used in control, register or toggle functions. The logic state is retained indefinitely with clock level either high or low, information is transferred to the output only on the positive-going edge of the clock pulse. It is capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range.
- Diode protection on all inputs
- Logic swing independent of fanout
- Logic edge-clocked flip-flop design
- Pin-for-pin replacement for CD4027B
Technical Attributes
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| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Matte Tin | ||
| 4000 | ||
| JK-Type | ||
| 260 | ||
| -4.2 mA | ||
| 350@5V|150@10V|100@15V ns | ||
| 0.004 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 2 | ||
| 2 | ||
| 1 | ||
| 2 | ||
| 0 | ||
| -55 to 125 °C | ||
| Differential | ||
| 16SOIC | ||
| 16 | ||
| Inverting|Non-Inverting | ||
| 10 x 4 x 1.5 mm | ||
| 50 pF | ||
| No | ||
| Set, Reset | ||
| SOIC | ||
| Positive-Edge | ||
| 3.3|5|9|12|15 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390090 |
| Schedule B: | 8542390060 |
Factory Lead Time: