MC100LVEL92DWG

The MC100LVEL92 is a triple PECL input to LVPECL output translator. The device receives standard PECL signals and translates them to differential LVPECL output signals.To accomplish the PECL to LVPECL level translation, the MC100LVEL92 requires three power rails. The V supply is to be connected to the standard 5 V PECL supply, the LV supply is to be connected to the 3.3 V LVPECL supply, and Ground is connected to the system ground plane. Both the V and LV should be bypassed to ground with 0.01 F capacitors.The PECL V pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. V may also rebias AC coupled inputs. When used, decouple V and V via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V should be left open.

• 500ps Propagation Delays
• 5V and 3.3V Supplies Required
• ESD Protection: >2 KV HBM, >200 V MM
• The 100 Series Contains Temperature Compensation
• LVPECL Operating Range: LVCC = 3.0 V to 3.8 V
• PECL Operating Range: V_CC = 4.5 V to 5.5 V
• Internal Input Pulldown Resistors
• Q Output will Default LOW with Inputs Open or < GND+1.3 V
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
• Transistor Count = 247 devices
• Pb-Free Packages are Available