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MC100LVEL14DWR2G

3.3 V ECL 1:5 Clock Distribution Chip

Manufacturer:onsemi
Product Category: Clock & Timing, Clock Buffers
Avnet Manufacturer Part #: MC100LVEL14DWR2G
Secondary Manufacturer Part#: MC100LVEL14DWR2G
  • Legend Information Icon RoHS 10 Compliant
  • Legend Information Icon Tariff Charges

The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and pin compatible with the EL14 but is designed to operate in ECL or PECL mode for a voltage supply range of -3.0 V to -3.8 V ( or 3.0 V to 3.8 V). The LVEL14 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. When LOW (or left open and pulled LOW by the input pulldown resistor) the SEL pin will select the differential clock input. The common enable (EN) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input. The V pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. V may also rebias AC coupled inputs. When used, decouple V and V via a 0.01 5F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, V should be left open.

  • 50 ps Output-to-Output Skew
  • Synchronous Enable/Disable
  • Multiplexed Clock Input
  • ESD Protection: >2 KV HBM
  • The 100 Series Contains Temperature Compensation
  • PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
    with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V
    with VEE = -3.0 V to -3.8 V
  • Internal Input Pulldown Resistors on CLK
  • Q Output will Default LOW with Inputs Open or at VEE
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Flammability Rating: UL-94 code V-0 @ 1/8",
    Oxygen Index 28 to 34
  • Transistor Count = 303 devices
"

Technical Attributes

Find Similar Parts

Description Value
Clock Distribution, Fanout Buffer
WSOIC
1 GHz
ECL, PECL
2
5
20
85 °C
-40 °C
ECL
MC100LVEL14 Series
3.8 Vdc
3 Vdc

ECCN / UNSPSC / COO

Description Value
Country of Origin: RECOVERY FEE
ECCN: EAR99
HTSN: 8542390050
Schedule B: 8542390060
In Stock :  0
Additional inventory
Factory Lead Time: 161 Weeks
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