MC100EP52DG
ECL Differential Clock/Data D Flip-Flop
- RoHS 10 Compliant
- Tariff Charges
- 330ps Typical Propagation Delay
- Maximum Frequency > 4 GHz Typical
- PECL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V
- NECL Mode: VCC = 0 V with VEE = -3.0 V to -5.5 V
- Open Input Default State
- Safety Clamp on Inputs
- Q Output will default LOW with inputs open or at VEE
- Pb-Free Packages are Available
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Differential | ||
| Matte Tin | ||
| ECL | ||
| 265 | ||
| -50 mA | ||
| 0.38@3V to 5.5V ns | ||
| -3, 3 V | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 1 | ||
| 1 | ||
| 1 | ||
| 1 | ||
| 0 | ||
| -40 to 85 °C | ||
| Differential | ||
| 8SOIC N | ||
| 8 | ||
| Inverting|Non-Inverting | ||
| 5 x 4 x 1.5 mm | ||
| No | ||
| SOIC N | ||
| Positive-Edge/Negative-Edge | ||
| -3.3|-5|3.3|5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |