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MC100EP32DTG

3.3 V / 5.0 V ECL ÷·2 Divider

Manufacturer:onsemi
Product Category: Clock & Timing, Clock Buffers
Avnet Manufacturer Part #: MC100EP32DTG
Secondary Manufacturer Part#: MC100EP32DTG
  • Legend Information Icon RoHS 10 Compliant
  • Legend Information Icon Tariff Charges

The MC10/100EP32 is an integrated divide by 2 divider with differential CLK inputs.The V pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. V may also rebias AC coupled inputs. When used, decouple V and V via a 0.01µF capacitor and limit current sourcing or sinking to 0.5mA. When not used, V should be left open.The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple EP32's in a system.The 100 Series contains temperature compensation.

  • 350ps Typical Propagation Delay
  • Maximum Frequency > 4 GHz Typical
  • PECL Mode Operating Range: VCC= 3.0 V to 5.5 V
    with VEE= 0 V
  • NECL Mode Operating Range: VCC= 0 V
    with VEE= –3.0 V to –5.5 V
  • Open Input Default State
  • Safety Clamp on Inputs
  • Q Output will default LOW with inputs open or at VEE
  • Pb-Free Packages are Available

Technical Attributes

Find Similar Parts

Description Value
85 °C
-40 °C
5.5 V
3 V

ECCN / UNSPSC / COO

Description Value
Country of Origin: RECOVERY FEE
ECCN: EAR99
HTSN: 8542390050
Schedule B: 8542390060
In Stock :  0
Additional inventory
Factory Lead Time: 161 Weeks
Price for: Each
Quantity:
Min:200  Mult:100  
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$7.135
400+
$6.74932
800+
$6.57171
1600+
$6.4032
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