74VHC595M
8-Bit Shift Register with Output Latches
- RoHS 10 Compliant
- Tariff Charges
The 74VHC595M is a 8-bit high-speed CMOS Shift Register with output latches. It is fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has eight 3-STATE outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input and serial output (standard) pins for cascading. Both the shift register and storage register use positive-edge triggered clocks. If both clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register. An input protection circuit insures that 0 to 7V can be applied to the input pins without regard to the supply voltage.
- Power down protection is provided on all inputs
- High noise immunity
- Low power dissipation
- Pin and function compatible with 74HC595
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Uni-Directional | ||
| Matte Tin | ||
| VHC | ||
| Shift Register | ||
| 260 | ||
| 16.5@3.3V|10.2@5V ns | ||
| 0.004 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 1 | ||
| 9 | ||
| 1 | ||
| 0 | ||
| 8 | ||
| -40 to 85 °C | ||
| Serial to Serial/Parallel | ||
| 3-State | ||
| 16SOIC N | ||
| No | ||
| 16 | ||
| 10 x 4 x 1.5 mm | ||
| 50 pF | ||
| No | ||
| SOIC N | ||
| No | ||
| Positive-Edge | ||
| 2.5|3.3|5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |