74LVT16373MTD
Low Voltage 16-Bit Transparent Latch with 3-STATE Outputs
The LVT16373 contain sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state. These latches are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT16373 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.
- Input and output interface capability to systems at 5V VCC
- Available without bushold feature (74LVT16373)
- Live insertion/extraction permitted
- Power Up/Power Down high impedance provides glitch-free bus loading
- Outputs source/sink 32 mA/ 64 mA
- Functionally compatible with the 74 series 16373
- Latch-up performance exceeds 500 mA
- ESD performance:
- Human-body model > 2000V
- Machine model > 200V
- Charged-device model > 1000V
- Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary)
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Transparent | ||
| Gold | ||
| LVT | ||
| 260 | ||
| -32 mA | ||
| 64 mA | ||
| 4.3@2.7V|3.9@3.3V ns | ||
| Surface Mount | ||
| MSL 2 - 1 year | ||
| 16 | ||
| 2 | ||
| 1 | ||
| 16 | ||
| 1 | ||
| 16 | ||
| 0 | ||
| -40 to 85 °C | ||
| 3-State | ||
| 48TSSOP W | ||
| 48 | ||
| Non-Inverting | ||
| 12.5 x 6.1 x 0.9 mm | ||
| 50 pF | ||
| No | ||
| No | ||
| TSSOP W | ||
| D-Type |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390090 |
| Schedule B: | 8542390060 |
Factory Lead Time: