UJA1168ATK/0Z

UJA1168ATK/0Z is a mini high-speed CAN system basis chip for partial networking containing an ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant HS-CAN transceiver and an integrated 5V/100mA supply for a microcontroller. It also features a watchdog and a Serial Peripheral Interface (SPI). The UJA1168A can be operated in very-low-current Standby and Sleep modes with bus and local wake-up capability and supports ISO 11898-2:2016 compliant CAN partial networking by means of a selective wake-up function. This function is called ‘FD-passive’ and is the ability to ignore CAN FD frames while waiting for a valid wake-up frame in sleep/standby mode. This additional feature of partial networking is the perfect fit for networks that support both CAN FD and standard CAN 2.0 communications. It allows normal CAN controllers that do not need to communicate CAN FD messages to remain in partial networking Sleep/Standby mode during CAN FD communication without generating bus errors.

• Hardware and software compatible with the UJA116x product family and with improved EMC performance
• Autonomous bus biasing according to ISO 11898-6
• Fully integrated 5V/100mA low-drop voltage regulator for 5V microcontroller supply (V1)
• Bus connections are truly floating when power to pin BAT is off
• Normal and standby modes, sleep mode, reset mode
• V1: 5V, µC and CAN, INH: high-voltage output
• SPI: for control and diagnostics, RSTN: reset pin host interface
• Watchdog, local WAKE pin, non-volatile memory, CAN partial networking
• HVSON14 package
• Virtual junction temperature range from -40 to +150°C