SPC5777CAK3MMO3R

SPC5777CAK3MMO3R is a Power Arch cores, 32bit MCU. Three dual issue, 32bit CPU core complexes (e200z7), two of which run in lockstep. It features power Architecture embedded specification compliance. Instruction set enhancement allowing variable length encoding (VLE), optional encoding of mixed 16-bit and 32bit instructions, for code size footprint reduction. On the two computational cores: Signal processing extension (SPE1.1) instruction support for digital signal processing (DSP). Single-precision floating point operations, on the two computational cores: 16KB I-Cache and 16KB D-Cache and hardware cache coherency between cores. An optional features field includes ISO-compliant CAN FD not available, trimmed for SMPS or external regulator and includes SHE-compliant security firmware version 2.08.

• Supply voltage range from 1.2 to 1.32V
• 8MB flash, 512KB RAM memory, 283 GPIO and 264MHz maximum operating frequency
• CAN, Ethernet, SCI, SPI interfaces
• Automotive qualified
• Dual core INTC, Dual PLLs, EBI, SIU, EIM and ERM, 4 PPO pins
• Boot Assist Module (BAM) supports serial bootload via CAN or SCI
• 5 DSPI, 5 eSCI and 4 FlexCAN modules
• Two M-CAN modules, FCCU, CMUs, TDM- and CSE
• 516 pin MAPBGA package
• Operating temperature range from -40 to 125°C