SPC5606SF2VLQ6

The SPC5606SF2VLQ6 is a 32-bit Microcontroller based on e200z0h compliant with power architecture book E CPU core complex . The device is designed to enable the development of automotive instrument cluster applications by providing a single-chip solution capable of hosting real-time applications and driving a TFT display directly using an on-chip colour TFT display controller. MPC5606S chips incorporate a cost-efficient host processor core compliant with the power architecture® embedded category. The processor is 100% user-mode compatible with the power architecture and capitalizes on the available development infrastructure of current power architecture devices with full support from available software drivers, operating systems and configuration code to assist with users' implementations. The device offers high performance processing at speeds up to 64MHz, 1MB of flash memory and 160kB of on-chip graphics SRAM.

• Single issue, 32-bit Power Architecture book E compliant CPU core complex (e200z0h)
• On-chip ECC flash memory with flash controller
• Memory protection unit (MPU) with 8 region descriptors and 32-byte region granularity
• Interrupt controller (INTC) with up to 127 peripheral interrupt sources and 8 software interrupts
• 2 Frequency-modulated phase-locked loops (FMPLLs)
• Crossbar switch architecture
• 16-channel Enhanced direct memory access controller (eDMA)
• Boot assist module (BAM)
• Display control unit to drive TFT LCD displays
• Parallel data interface (PDI) for digital video input
• LCD segment driver module with two software programmable configurations
• Stepper motor controller (SMC) module
• Stepper motor return-to-zero and stall detection module
• Sound generation and playback utilizing PWM channels and eDMA
• 24 eMIOS channels providing up to 16 PWM and 24 input capture/output comp