PDP SEO Portlet

PCA9513ADP,118

Logic IC, Hot Swappable Bus Buffer, PCA9513A Series

Official logo for NXP
Manufacturer:NXP
Product Category: Logic ICs, Other Logic ICs
Avnet Manufacturer Part #: PCA9513ADP,118
Secondary Manufacturer Part#: PCA9513ADP,118
  • Legend Information Icon RoHS 10 Compliant
  • Legend Information Icon Tariff Charges

The PCA9513A and PCA9514A are hot swappable I²C-bus and SMBus buffers that allow I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9513A and PCA9514A provides bidirectional buffering, keeping the backplane and card capacitances isolated. Rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. The PCA9513A and PCA9514A incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the device into a Low current mode when asserted LOW, and an open-drain READY output pin, which indicates that the backplane and card sides are connected together (HIGH) or not (LOW). The PCA9513A supplies a 92 uA current source to SCLIN and SDAIN pins in lieu of using pull-up resistors which is ideal for multidrop bus applications. Including the current source in the device provides for a consistent RC time constant as cards are removed and inserted into the backplane. The current source is high-impedance whenever the pin voltage is greater than the part VCC. The PCA9513A and PCA9514A rise time accelerator threshold is 0.8 V to provide better noise margin over the PCA9511A which is set to 0.6 V.

  • Bidirectional buffer for SDA and SCL lines increases fan-out and prevents SDA and SCL corruption during live board insertion and removal from multipoint backplane systems
  • Compatible with I²C-bus Standard mode, I²C-bus Fast mode, and SMBus standards
  • Built-in ?V/?t rise time accelerators on all SDA and SCL lines (0.8 V threshold) requires the bus pull-up voltage and supply voltage (VCC) to be the same
  • Rise time accelerator threshold moved from 0.6 V to 0.8 V for improved noise margin
  • Active HIGH ENABLE input
  • Active HIGH READY open-drain output
  • High-impedance SDAn and SCLn pins for VCC = 0 V
  • 92 uA current source on SCLIN and SDAIN for PICMG backplane applications (PCA9513A only)
  • Supports clock stretching and multiple master arbitration and synchronization
  • Operating power supply voltage range: 2.7 V to 5.5 V
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM

Technical Attributes

Find Similar Parts

Description Value
Bus Buffer
Gold
260 °C
80 ns
Surface Mount
MSL 1 - Unlimited
2
2.7 to 5.5 V
-40 to 85 °C
8TSSOP
8
3.1 x 3.1 x 0.95 mm mm
No
Industrial
TSSOP

ECCN / UNSPSC / COO

Description Value
Country of Origin: RECOVERY FEE
ECCN: EAR99
HTSN: 8542390070
Schedule B: 8542390060
In Stock :  0
Additional inventory
Factory Lead Time: 112 Weeks
Price for: Each
Quantity:
Min:2500  Mult:2500  
USD $:
2500+
$1.24957
5000+
$1.18203
10000+
$1.15092
15000+
$1.12141
20000+
$1.09338