MCIMX507CVK8BR2

The i.MX50 applications processors are multimedia-focused products offering high-performance processing optimized for lowest power consumption. The i.MX50 processors are Freescale Energy Efficiency Solutions products. The i.MX50 is optimized for portable multimedia applications and features Freescale’s advanced implementation of the ARM Cortex-A8 core, which operates at speeds as high as 1 GHz. The i.MX50 provides a powerful display architecture, including a 2D Graphics Processing Unit (GPU) and Pixel Processing Pipeline (ePXP). Additionally, the i.MX50 includes a complete integration of the electrophoretic display function. The i.MX50 supports DDR2, LPDDR2, and LPDDR1 DRAM at clock rate up to 266 MHz to enable a range of performance and power trade-offs. The flexibility of the i.MX50 architecture allows it to be used in a variety of applications. As the heart of the application chipset, the i.MX50 provides a rich set of interfaces for connecting peripherals, such as WLAN, Bluetooth, GPS, and displays.

• MMU, L1 instruction cache, and L1 data cache
• Unified L2 cache
• 800 MHz or 1 GHz target frequency of the core (including NEON, VFPv3, and L1 cache)
• NEON coprocessor (SIMD Media Processing Architecture) and Vector Floating Point (VFP-Lite) coprocessor supporting VFPv3 The memory system consists of the following components:
• Level 1 cache:
  • Instruction (32 Kbyte)
  • Data (32 Kbyte)
• Level 2 cache:
  • Unified instruction and data (256 Kbyte)
• Level 2 (internal) memory:
  • Boot ROM, including HAB (96 Kbyte)
  • Internal multimedia/shared, fast access RAM (128 Kbyte)
• External memory interfaces:
  • 16/32-bit DDR2-533, LPDDR2-533, or LPDDR1-400 up to a total of 2 GByte
  • 8-bit NAND SLC/MLC Flash with up to 100 MHz synchronous clock rate and up to 32-bit hardware ECC for 1 Kbyte block size
  • 16/32-bit NOR Flash with a dedicated 16-bit muxed-mode interface. I/O mux