MC33910G5ACR2
Pref DRVR Dual 5.5V to 18V 32-Pin LQFP T/R
									
									
									- RoHS 10 Compliant
 - Tariff Charges
 
The 33910 is a Serial Peripheral Interface (SPI)-controlled System Basis Chip (SBC), that combines many frequently used functions in an MCU-based system, plus a Local Interconnect Network (LIN) transceiver. It has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI-readable diagnostic and a selectable timing watchdog for detecting errant operation. The LIN Protocol Specification, version 2.0 and 2.1 ('G5AC) compliant LIN transceiver has waveshaping circuitry that can be disabled for higher data rates. Two 60 mA high side switches with optional pulse-width modulation (PWM) are implemented to drive small loads. One high voltage input is available for use in contact monitoring or as external wake-up input. This input can be used as high voltage Analog Input as well. The voltage on this pin is divided by a selectable ratio and available via an analog multiplexer. The 33910 has three main operating modes: Normal (all functions available); Sleep (VDD off, wake-up via LIN, wake-up input (L1), cyclic sense and forced wake-up) and Stop (VDD on with limited current capability, wake-up via CS, LIN bus, wake-up input, cyclic sense, forced wake-up and external reset). The 33910 is compatible with LIN Protocol Specification 2.0, 2.1 ('G5AC) and SAEJ2602-2.('G5AC)
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Matte Tin | ||
| 260 | ||
| 10000 ns | ||
| 10000 ns | ||
| Surface Mount | ||
| MSL 3 - 168 hours | ||
| 2 | ||
| 5 V | ||
| 32LQFP | ||
| 32 | ||
| 7 x 7 x 1.45 mm | ||
| No | ||
| LQFP | 
ECCN / UNSPSC / COO
| Description | Value | 
|---|---|
| Country of Origin: | NO RECOVERY FEE | 
| ECCN: | EAR99 | 
| HTSN: | 8542390070 | 
| Schedule B: | 8542390060 |