LPC55S69JBD100Y
Microcontroller ARM Cortex-M33 RISC 40nm 640KB Flash 100-Pin HLQFP

- RoHS 10 Compliant
- Tariff Charges
LPC55S69JBD100Y is a LPC55S6x series 32bit ARM Cortex-M33 based microcontroller for embedded application. This device includes an ARM Cortex-M33 coprocessor, CASPER Crypto/FFT engine, PowerQuad hardware accelerator for DSP functions, PRINCE module for on-the-fly flash encryption/decryption, high-speed and full-speed USB host and device interface with crystal-less operation for full-speed, SD/MMC/SDIO interface, five general-purpose timers, one SCTimer/PWM, one RTC/alarm timer, one 24bit multi-rate timer (MRT), a windowed watchdog timer (WWDT), nine flexible serial communication peripherals (which can be configured as a USART, SPI, high speed SPI, I2C, or I2S interface), programmable logic unit (PLU), one 16bit 1.0 Msamples/sec ADC capable of simultaneous conversions. The ARM Cortex-M33 provides a security foundation, offering isolation to protect valuable IP and data with TrustZone® technology.
- Primary core (CPU0), secondary core (CPU1), secure boot, PUF controller, HASH-AES, SDIO protocol
- 640KB flash, 320KB total SRAM, USB (FS + HS) interface, 64 GPIO
- Operating temperature range from -40°C to +105°C, package is HLQFP100
- ARM Cortex-M33 core (CPU0, r0p3):running at a frequency of up to 150MHz
- TrustZone®, floating point unit (FPU) and memory protection unit (MPU)
- ARM Cortex M33 built-in nested vectored interrupt controller (NVIC)
- Non-maskable Interrupt (NMI) input with a selection of sources, system tick timer
- Operating from internal DC-DC converter, single power supply 1.8V to 3.6V
- JTAG boundary scan supported
- Integrated PMU (Power Management Unit) to minimize power consumption
Technical Attributes
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Description | Value | |
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LPC | ||
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ECCN / UNSPSC / COO
Description | Value |
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Country of Origin: | RECOVERY FEE |
ECCN: | 5A992.C |
HTSN: | 8542310025 |
Schedule B: | 8542310075 |