LPC43S50FET256,551

The LPC43S30FBD144 is a ARM Cortex-M4 based microcontroller for embedded applications which includes an ARM Cortex-M0 coprocessor, 264 kB of SRAM, security features with AES engine, advanced configurable peripherals such as the State Configurable Timer/PWM (SCTimer/PWM) and the Serial General-Purpose I/O (SGPIO) interface, two High-speed USB controllers, Ethernet, an external memory controller, and multiple digital and analog peripherals. The LPC43S30FBD144 operates at CPU frequencies of up to 204 MHz. The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point unit is integrated in the core. The ARM Cortex-M4 with floating-point unit is often referred to as M4F. The ARM Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core which is code- and tool-compatible with the Cortex-M4 core. The Cortex-M0 coprocessor offers up to 204 MHz performance with a simple instruction set and reduced code size.

• Cortex-M4 Processor core
  • ARM Cortex-M4 processor, running at frequencies of up to 204 MHz.
  • Built-in Memory Protection Unit (MPU) supporting eight regions.
  • Built-in Nested Vectored Interrupt Controller (NVIC).
  • Hardware floating-point unit making the core a Cortex-M4.
  • Non-maskable Interrupt (NMI) input.
  • JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watchpoints.
  • Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.
  • System tick timer.
• Cortex-M0 Processor core
  • ARM Cortex-M0 coprocessor capable of off-loading the main ARM Cortex-M4F application processor.
  • Running at frequencies of up to 204 MHz.
  • JTAG
  • Built-in NVIC.
• On-chip memory
  • 264 kB SRAM for code and data use.
  • Multiple SRAM blocks with separate bus access. Two SRAM blocks can be powered down individually
  • 64 kB ROM containing boot code