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LPC1759FBD80,551

MCU 32-bit LPC1700 ARM Cortex M3 RISC 512KB Flash 2.5V/3.3V 80-Pin LQFP Tray

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Manufacturer:NXP
Avnet Manufacturer Part #: LPC1759FBD80,551
Secondary Manufacturer Part#: LPC1759FBD80,551
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The LPC1759/58/56/54/52/51 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The LPC1758/56/57/54/52/51 operate at CPU frequencies of up to 100 MHz. The LPC1759 operates at CPU frequencies of up to 120 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The peripheral complement of the LPC1759/58/56/54/52/51 includes up to 512 kB of flash memory, up to 64 kB of data memory, Ethernet MAC, USB Device/Host/OTG interface, 8-channel general purpose DMA controller, 4 UARTs, 2 CAN channels, 2 SSP controllers, SPI interface, 2 I2C-bus interfaces, 2-input plus 2-output I2S-bus interface, 6 channel 12-bit ADC, 10-bit DAC, motor control PWM, Quadrature Encoder interface, 4 general purpose timers, 6-output general purpose PWM, ultra-low power Real-Time Clock (RTC) with separate battery supply, and up to 52 general purpose I/O pins.

  • ARM Cortex-M3 processor, running at frequencies of up to 100 MHz (LPC1758/56/57/54/52/51) or of up to 120 MHz (LPC1759). A Memory Protection Unit (MPU) supporting eight regions is included.
  • ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
  • Up to 512 kB on-chip flash programming memory. Enhanced flash memory accelerator enables high-speed 120 MHz operation with zero wait states.
  • In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
  • On-chip SRAM includes:
    • Up to 32 kB of SRAM on the CPU with local code/data bus for high-performance CPU access.
    • Two/one 16 kB SRAM blocks with separate access paths for higher throughput. These SRAM blocks may be used for Ethernet (LPC1758 only), USB, and DMA memory, as well as for general purpose CPU instruction and data storage.
  • Eight channel General Purpose DMA controller (GPDMA) on the AHB multilayer matrix that can be us

Technical Attributes

Find Similar Parts

Description Value
32 Bit
ARM Cortex M3
LQFP
Surface Mount
CAN/I2C/I2S/SPI/UART
52
80
120
85 °C
-40 °C

ECCN / UNSPSC / COO

Description Value
Country of Origin: RECOVERY FEE
ECCN: 3A991.A.2
HTSN: 8542310025
Schedule B: 8542310025
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Factory Lead Time: 2 Weeks
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