LPC11E67JBD64E

The LPC11E6x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 50 MHz. The LPC11E6x support up to 256 KB of flash memory, a 4 KB EEPROM, and 36 KB of SRAM. The ARM Cortex-M0+ is an easy-to-use, energy-efficient core using a two-stage pipeline and fast single-cycle I/O access. The peripheral complement of the LPC11E6x includes a DMA controller, a CRC engine, two I2C-bus interfaces, up to five USARTs, two SSP interfaces, PWM/timer subsystem with six configurable multi-purpose timers, a Real-Time Clock, one 12-bit ADC, temperature sensor, function-configurable I/O ports, and up to 80 general-purpose I/O pins.

• System:
  • ARM Cortex-M0+ processor (version r0p1), running at frequencies of up to 50 MHz with single-cycle multiplier and fast single-cycle I/O port.
  • ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).
  • AHB Multilayer matrix.
  • System tick timer.
  • Serial Wire Debug (SWD) and JTAG boundary scan modes supported.
  • Micro Trace Buffer (MTB) supported.
• Memory:
  • Up to 256 KB on-chip flash programming memory with page erase.
  • Up to 32 KB main SRAM.
  • Up to two additional SRAM blocks of 2 KB each.
  • Up to 4 KB EEPROM.
• ROM API support:
  • Boot loader.
  • USART drivers.
  • I2C drivers.
  • DMA drivers.
  • Power profiles.
  • Flash In-Application Programming (IAP) and In-System Programming (ISP).