HTRC11001T/02EE,11

The HITAG Reader Chip HTRC110 is intended for use with transponders, which are based on NXP Semiconductors based HITAG transponder ICs. In addition the IC supports other 125 kHz transponder types using amplitude modulation for the write operation and AM/PM for the read operation. The receiver parameters (gain factors, filter cutoff frequencies) can be optimized to system and transponder requirements. The HTRC110 is designed for easy integration into RF-identification readers. State-of-the-art technology allows almost complete integration of the necessary building blocks. A powerful antenna driver/modulator together with a low-noise adaptive sampling time demodulator, programmable filters/amplifier and digitizer build the complete transceiver unit, required to design high-performance readers. A three-pin microcontroller interface is employed for programming the HTRC110 as well as for the bidirectional communication with the transponders. The three-wire interface can be changed into a two-wire interface by connecting the data input and the data output. Tolerance dependent zero amplitude modulation caused severe problems in envelope detector systems, resulting in the need of very low tolerance reader antennas. These problems are solved by the Adaptive Sampling Time technique (AST).

• Optimized for HITAG transponder ICs
• Robust antenna coil power driver stage with modulator
• High performance adaptive sampling time AM/PM demodulator (patent pending)
• Read and write function
• On-chip clock oscillator
• Antenna rupture and short circuit detection
• Low power consumption
• Very low power stand-by mode
• Low external component count
• Small package (SO14)