HEF4017BT,653
Decade, Johnson Counter, 30 MHz, 3 V to 15 V, SOIC-16
The HEF4017BT is a 5-stage Johnson Decade Counter with ten spike-free decoded active high outputs (Q0 to Q9), an active low carry output from the most significant flip-flop (Q5\-9), active high and active low clock inputs (CP0, CP1\) and an overriding asynchronous master reset input (MR). The counter is advanced by either a low-to-high transition at CP0 while CP1\ is low or a high-to-low transition at CP1\ while CP0 is high. When cascading counters, the Q5\-9 output, which is low while the counter is in states 5, 6, 7, 8 and 9, can be used to drive the CP0 input of the next counter. A high on MR resets the counter to zero (Q0 = Q5\-9 = high, Q1 to Q9 = low) independent of the clock inputs (CP0, CP1\). Automatic counter code correction is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses. Schmitt trigger action makes the clock inputs highly tolerant of slower rise and fall times.
- Automatic counter correction
- Tolerant of slow clock rise and fall times
- Fully static operation
- Standardized symmetrical output characteristics
- Complies with JEDEC standard JESD 13-B
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Uni-Directional | ||
| Gold | ||
| HEF4000 | ||
| Counter | ||
| 260 °C | ||
| 80@15V ns | ||
| 20 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 1 | ||
| 10 | ||
| 1 | ||
| 0 | ||
| 5 | ||
| 3 to 15 V | ||
| -40 to 125 °C | ||
| UP Counter | ||
| 16SO | ||
| No | ||
| 16 | ||
| 10 x 4 x 1.45 mm mm | ||
| 50 pF | ||
| No | ||
| Asynchronous | ||
| Automotive | ||
| SOIC | ||
| Yes | ||
| Positive-Edge | ||
| Decade |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |