74VHC126PW,118
Buffer / Line Driver, 74VHC126, 4 Element, 2 V to 5.5 V, 14 Pins, TSSOP
- RoHS 10 Compliant
- Tariff Charges
The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC126; 74VHCT126 provide four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A LOW-level at pin nOE causes the outputs to assume a high-impedance OFF-state. The 74VHC126; 74VHCT126 are identical to the 74VHC125; 74VHCT125 but have active HIGH output enable inputs.
- Balanced propagation delays
- All inputs have Schmitt-trigger action
- Inputs accept voltages higher than VCC
- Input levels:
- The 74VHC126 operates with CMOS input level
- The 74VHCT126 operates with TTL input level
- ESD protection:
- HBM JESD22-A114E exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- CDM JESD22-C101C exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Gold | ||
| VHC | ||
| Buffer/Line Driver | ||
| 260 | ||
| -8 mA | ||
| 8 mA | ||
| 5.5 V | ||
| 11.5@3V to 3.6V|7.5@4.5V to 5.5V ns | ||
| 2 uA | ||
| 2 V | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 4 | ||
| 4 | ||
| 0 | ||
| 4 | ||
| 4 High | ||
| 4 | ||
| -40 to 125 °C | ||
| 3-State | ||
| 14 | ||
| Non-Inverting | ||
| 5.1 x 4.5 x 0.95 mm | ||
| 50 pF | ||
| No | ||
| TSSOP | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |