74LVT16373ADGG,118
Latch, 74LVT16373, D Type Transparent, Tri State, 3.9 ns, 64 mA, 48 Pins, TSSOP
The 74LVT16373A is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is a 16-bit transparent D-type latch with non-inverting 3-State bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When enable (E) input is High, the Q outputs follow the data (D) inputs. When enable is taken Low, the Q outputs are latched at the levels of the D inputs one setup time prior to the High-to-Low transition.
- 16-bit transparent latch
- 3-State buffers
- Output capability: +64mA/-32mA
- TTL input and output switching levels
- Input and output interface capability to systems at 5V supply
- Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
- Live insertion/extraction permitted
- Power-up reset
- Power-up 3-State
- No bus current loading when output is tied to 5V bus
- Latch-up protection exceeds 500mA per JEDEC Std 17
- ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Yes | ||
| Transparent | ||
| Gold | ||
| LVT | ||
| 260 | ||
| -32 mA | ||
| 64 mA | ||
| 1.9@3.3V ns | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 16 | ||
| 2 | ||
| 1 | ||
| 16 | ||
| 1 | ||
| 16 | ||
| 0 | ||
| -40 to 85 °C | ||
| 3-State | ||
| 48TSSOP | ||
| 48 | ||
| Non-Inverting | ||
| 12.6 x 6.2 x 1.05 mm | ||
| 50 pF | ||
| No | ||
| No | ||
| TSSOP | ||
| D-Type |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
Factory Lead Time: