74LVC377PW,118
Flip-Flop, 74LVC377, D, 15 ns, 330 MHz, TSSOP
Click image to enlarge
Manufacturer:Nexperia
Product Category:
Logic ICs, Flip Flops
Avnet Manufacturer Part #: 74LVC377PW,118
Secondary Manufacturer Part#: 74LVC377PW,118
-
RoHS 10 Compliant -
Tariff Charges
The 74LVC377 has eight edge-triggered D-type flip-flops with individual inputs (D) and outputs (Q). A common clock input (CP) loads all flip-flops simultaneously when data enable input (E) is LOW. The state of each D input, one set-up time before the LOW to HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. Input E must be stable only one set-up time prior to the LOW to HIGH transition for predictable operation.
- Wide supply voltage range from 1.2 V to 3.6 V
- Inputs accept voltages up to 5.5 V
- CMOS low power consumption
- Direct interface with TTL levels
- Output drive capability 50 O transmission lines at 125 °C
- Complies with JEDEC standard:
- JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V)
- JESD8-C/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-B exceeds 200 V
- CDM JESD22-C101E exceeds 1000 V
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Gold | ||
| LVC | ||
| D-Type Bus Interface | ||
| 260 | ||
| -24 mA | ||
| 4.3@2.7V|4@3.3V ns | ||
| 0.0001 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 8 | ||
| 8 | ||
| 8 | ||
| 1 | ||
| 0 | ||
| -40 to 125 °C | ||
| Single-Ended | ||
| 20TSSOP | ||
| 20 | ||
| Non-Inverting | ||
| 6.6 x 4.5 x 0.95 mm | ||
| 50 pF | ||
| No | ||
| TSSOP | ||
| Positive-Edge | ||
| 1.8|2.5|3.3 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
Factory Lead Time: