74LVC2G86DP-Q100H
XOR (Exclusive OR), Dual, 2 Input, 8 Pins, TSSOP, 74LVC2G86
- RoHS 10 Compliant
- Tariff Charges
The 74LVC2G86-Q100 provides a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
- Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
- Wide supply voltage range from 1.65 V to 5.5 V
- 5 V tolerant inputs for interfacing with 5 V logic
- High noise immunity
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8B/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- MIL-STD-883, method 3015 exceeds 2000 V
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 O)
- ±24 mA output drive (VCC = 3.0 V)
- CMOS low-power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Inputs accept voltages up to 5 V
- Multiple package options
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Gold over Nickel Palladium | ||
| XOR | ||
| 260 | ||
| -32 mA | ||
| 32 mA | ||
| 3.8(Typ)@1.8V|2.5(Typ)@2.5V|3(Typ)@2.7V|2.3(Typ)@3.3V|1.9(Typ)@5V ns | ||
| 40 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 0 | ||
| -40 to 125 °C | ||
| 8TSSOP | ||
| 8 | ||
| 3.1(Max) x 3.1(Max) x 0.95(Max) | ||
| No | ||
| Automotive | ||
| TSSOP | ||
| 0.1 uA |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |