74LVC2G53DC,125

The 74LVC2G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC2G53 provides one analog multiplexer/demultiplexer with a digital select input (S), two independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an active LOW enable input (E). When pin E is HIGH, the switch is turned off. Schmitt-trigger action at the select and enable inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V.

• Wide supply voltage range from 1.65V to 5.5V
• High noise immunity, CMOS low-power consumption
• Latch-up performance meets requirements of JESD 78 class I
• Input clamping current is -50mA min at VI < -0.5V or VI > VCC + 0.5V
• Ground current is -100mA minimum
• Total power dissipation is 250mW max at Tamb = -40°C to +125°C
• Switch current is ±50mA max at VSW > -0.5V or VSW < VCC + 0.5V
• Input transition rise and fall rate is 20ns/V max at VCC = 1.65V to 2.7V
• VSSOP8 package
• Temperature range from -40 to +125°C