74LVC2G17GW,125
Buffer, 74LVC2G17, 1.65 V to 5.5 V, SC-88-6
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Manufacturer:Nexperia
Product Category:
Logic ICs, Gates & Inverters
Avnet Manufacturer Part #: 74LVC2G17GW,125
Secondary Manufacturer Part#: 74LVC2G17GW,125
- RoHS 10 Compliant
- Tariff Charges
The 74LVC2G17GW,125 is a dual non-inverting Buffer with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs can be driven from either 3.3/5V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
- High noise immunity
- CMOS low-power consumption
- Direct interface with TTL levels
- Complies with JEDEC standard
- 5V Tolerant input/output for interfacing with 5V logic
- Latch-up performance exceeds 250mA
- ±24mA Output drive
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Tin | ||
| LVC | ||
| Schmitt Trigger Buffer | ||
| 260 | ||
| -32 mA | ||
| 32 mA | ||
| 5.5 V | ||
| 3.8@2.7V|3.6@3.3V|2.7@5V ns | ||
| 40 uA | ||
| 1.65 V | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 2 | ||
| 2 | ||
| 0 | ||
| 2 | ||
| 0 | ||
| 2 | ||
| -40 to 125 °C | ||
| 6 | ||
| Non-Inverting | ||
| 2.2 x 1.35 x 1 mm | ||
| 50 pF | ||
| No | ||
| TSSOP | ||
| 5 V | ||
| 1.8|2.5|3.3|5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |