74LVC1G02GN,132
NOR Gate 1-Element 2-IN CMOS 6-Pin XSON
- RoHS 10 Compliant
- Tariff Charges
The 74LVC1G02 provides the single 2-input NOR function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Wide supply voltage range from 1.65 V to 5.5 V ? High noise immunity ? Complies with JEDEC standard: ? JESD8-7 (1.65 V to 1.95 V) ? JESD8-5 (2.3 V to 2.7 V) ? JESD8-B/JESD36 (2.7 V to 3.6 V) ? ?24 mA output drive (VCC = 3.0 V) ? CMOS low power consumption ? Latch-up performance exceeds 250 mA ? Direct interface with TTL levels ? Inputs accept voltages up to 5 V ? Multiple package options ? ESD protection: ? HBM JESD22-A114F exceeds 2000 V ? MM JESD22-A115-A exceeds 200 V ? Specified from ?40 ?C to +85 ?C and ?40 ?C to +125 ?C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Tin | ||
| 260 | ||
| 2.5@2.7V|2.1@3.3V|1.7@5V ns | ||
| 200 uA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| -40 to 125 °C | ||
| 6XSON | ||
| 6 | ||
| 1 x 0.9 x 0.31 mm | ||
| No | ||
| XSON |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |