74LV4051PW,118

74LV4051PW,118 is a 8-channel analogue multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable input (active-low E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC4051 and 74HCT4051. With active-low E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With active-low E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and active-low E). The VCC to GND ranges are 1V to 6V. The analogue inputs/outputs (Y0 to Y7, and Z) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).

• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
• Logic level translation: to enable 3V logic to communicate with ±3V analogue signals
• Typical ‘break before make’ built in
• ESD protection: HBM JESD22-A114E exceeds 2000V, MM JESD22-A115-A exceeds 200V
• Input leakage current is 1µA maximum at (VCC = 3.6V, -40°C to +85°C)
• Supply current is 20µA maximum at (VCC = 3.6V, -40°C to +85°C)
• ON resistance (rail) is 225 ohm typical at (VCC = 1.2V; ISW = 100µA, -40°C to +85°C)
• Propagation delay is 25ns typical at (VCC = 1.2V, -40°C to +85°C)
• Operating temperature range from -40°C to +125°C
• TSSOP16 package