74LV244PW,118

74LV244PW,118 is an 8bit buffer/line driver with 3-state outputs. This device can be used as two 4bit buffers or one 8bit buffer. This device features two output enables, each controlling four of the 3-state outputs. A HIGH on n active-low OE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. It complies with JEDEC standards (JESD8-7 (1.65V to 1.95V), JESD8-5 (2.3V to 2.7V), JESD8C (2.7V to 3.6V), JESD36 (4.5V to 5.5V). It features ESD protection (HBM JESD22-A114F exceeds 2000V, MM JESD22-A115-A exceeds 200V).

• Wide supply voltage range from 1.0V to 5.5V
• CMOS low power dissipation, optimized for low voltage applications: 1V to 3.6V
• Latch-up performance exceeds 100mA per JESD 78 Class II Level B
• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
• Typical VOLP (output ground bounce) 0.8V at VCC = 3.3V; Tamb = 25°C
• Typical VOHV (output VOH undershoot) 2V at VCC = 3.3V; Tamb = 25°C
• Input leakage current is 1µA maximum at (VCC = 5.5V;VI= VCC or GND, -40°C to +85°C)
• Supply current is 20µA maximum at (VCC = 5.5V;VI = VCC or GND;IO = 0A, -40°C to +85°C)
• Propagation delay is 50ns typical at (VCC = 1.2V, -40°C to +85°C)
• Operating temperature range from -40°C to +125°C, TSSOP20 package