74HCT595D,118
Shift Register, 74HCT595, Serial to Parallel, Serial to Serial, 1 Element, 8 -Bit, 16 Pins, SOIC
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RoHS 10 Compliant -
Tariff Charges
The 74HCT595D is a 8-bit serial-in, serial or parallel-out Shift Register with output latches and 3-state output. The registers have separate clocks. The 74HCT595 is high-speed Si-gate CMOS devices and are pin compatible with low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard number 7A. Data is shifted on the positive-going transitions of the shift register clock input (SHCP). The data in each register is transferred to the storage register on a positive-going transition of the storage register clock input (STCP). If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
- Shift register with direct clear
- 100MHz Typical shift out frequency
- TTL Input level
- Complies with JEDEC standard No. 7A
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Uni-Directional | ||
| Gold | ||
| HCT | ||
| Shift Register | ||
| 260 | ||
| 42@4.5V ns | ||
| 0.16 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 1 | ||
| 9 | ||
| 1 | ||
| 0 | ||
| 8 | ||
| -40 to 125 °C | ||
| Serial to Serial/Parallel | ||
| 3-State | ||
| 16SO | ||
| No | ||
| 16 | ||
| 10 x 4 x 1.45 mm | ||
| 50 pF | ||
| Asynchronous | ||
| SOIC | ||
| No | ||
| Positive-Edge | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
Factory Lead Time: