74HCT238PW-Q100J

The 74HCT238_Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs. Every output is LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four 74HC_HCT238_Q100 ICs and one inverter. The 74HC_HCT238_Q100 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Input levels:
  • For 74HC238-Q100: CMOS level
  • For 74HCT238-Q100: TTL level
• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Active HIGH mutually exclusive outputs
• Multiple package options
• Complies with JEDEC standard no. 7A
• ESD protection:
  • MIL-STD-883, method 3015 exceeds 2000 V
  • HBM JESD22-A114F exceeds 2000 V
  • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ?)