74HCT174PW,118
Flip Flop, 74HCT174, D, 18 ns, 69 MHz, 4 mA, 16 Pins, TSSOP
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Manufacturer:Nexperia
Product Category:
Logic ICs, Flip Flops
Avnet Manufacturer Part #: 74HCT174PW,118
Secondary Manufacturer Part#: 74HCT174PW,118
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RoHS 10 Compliant -
Tariff Charges
The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT174 have six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one set-up time prior to the LOW-to-HIGH clock transition, is transferred to the corresponding output of the flip-flop.
- Six edge-triggered D-type flip-flops
- Asynchronous master reset
- Output capability: standard
- ICC category: MSI
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Gold | ||
| HCT | ||
| D-Type Bus Interface | ||
| 260 | ||
| -4 mA | ||
| 35@4.5V ns | ||
| 0.008 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 6 | ||
| 6 | ||
| 6 | ||
| 1 | ||
| 0 | ||
| -40 to 125 °C | ||
| Single-Ended | ||
| 16TSSOP | ||
| 16 | ||
| Non-Inverting | ||
| 5.1 x 4.5 x 0.95 mm | ||
| 50 pF | ||
| No | ||
| Master Reset | ||
| TSSOP | ||
| Positive-Edge | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
Factory Lead Time: