74HCT08PW,118

74HCT08PW,118 is a quad 2-input AND gate. This device inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. It complies with JEDEC standards (JESD8C (2.7V to 3.6V), JESD7A (2.0V to 6.0V). It features ESD protection (HBM JESD22-A114F exceeds 2000V, MM JESD22-A115-A exceeds 200V).

• Wide supply voltage range from 4.5V to 5.5V
• CMOS low power dissipation, high noise immunity
• Latch-up performance exceeds 100mA per JESD 78 Class II Level B
• TTL input level, input capacitance is 3.5pF typical at (25°C)
• Input leakage current is ±0.1µA maximum at (VI = VCC or GND; VCC = 5.5V, 25°C)
• Supply current is 2µA maximum at (VI = VCC or GND; IO = 0A; VCC = 5.5V, 25°C)
• Propagation delay is 14ns typical at (VCC = 4.5V, 25°C)
• Transition time is 7ns typical at (VCC = 4.5V, 25°C)
• Operating temperature range from -40°C to +125°C
• TSSOP14 package