74HC574D,653
Flip-Flop, Tri State Non Inverted, Positive Edge, 74HC574, D, 14 ns, 133 MHz, 7.8 mA, SOIC
-
RoHS 10 Compliant -
Tariff Charges
The 74HC574D is an octal D-type Flip-Flop with positive edge-trigger and 3-state is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL. It is specified in compliance with JEDEC standard no-7A. This octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the low-to-high CP transition. When OE is low the contents of the 8 flip-flops are available at the outputs. When OE is high, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
- 8-bit Positive, edge-triggered register
- ESD protection HBM JESD22-A114F exceeds 2000V
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Gold | ||
| HC | ||
| D-Type Bus Interface | ||
| 260 | ||
| -7.8 mA | ||
| 150@2V|30@4.5V|26@6V ns | ||
| 0.008 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 8 | ||
| 8 | ||
| 8 | ||
| 1 | ||
| 1 | ||
| -40 to 125 °C | ||
| Single-Ended | ||
| 3-State | ||
| 20SO | ||
| 20 | ||
| Non-Inverting | ||
| 13 x 7.6 x 2.45 mm | ||
| 50 pF | ||
| No | ||
| SOIC | ||
| Positive-Edge | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
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