74HC573D,653
Latch, HC Family, 74HC573, Transparent, Tri State Non Inverted, 14 ns, 7.8 mA, SOIC
The 74HC573D is a high speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC573D has octal D-type transparent latches featuring separate D-type inputs for each latch and 3 state true outputs for bus oriented applications. A latch enable input and an output enable input are common to all latches.
- Inputs and outputs on opposite sides of package allowing easy interface with microprocessors
- Useful as input or output port for microprocessors and microcomputers
- 3-state Non-inverting outputs for bus-oriented applications
- Common 3-state output enable input
- CMOS Input level
- Complies with JEDEC standard No. 7A
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| 0 | ||
| Transparent | ||
| Gold | ||
| HC | ||
| 260 °C | ||
| -7.8 mA | ||
| 7.8 mA | ||
| 26@6V ns | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 8 | ||
| 1 | ||
| 1 High | ||
| 8 | ||
| 1 Low | ||
| 8 | ||
| 0 | ||
| 2 to 6 V | ||
| -40 to 125 °C | ||
| 3-State | ||
| 20SO | ||
| 20 | ||
| Non-Inverting | ||
| 13 x 7.6 x 2.45 mm mm | ||
| 50 pF | ||
| No | ||
| Extended Industrial | ||
| No | ||
| SOIC | ||
| D-Type |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
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