74HC4040D,653
Binary Ripple Counter, HC Family, 98 MHz, 2 V to 6 V, SOIC-16
The 74HC4040D is a 12-stage Binary Ripple Counter with a clock input (CP\), an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the high-to-low transition of CP\. A high on MR clears all counter stages and forces all outputs low, independent of the state of CP\. Each counter stage is a static toggle flip-flop. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
- CMOS Input levels
- Complies with JEDEC standard No. 7A
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Uni-Directional | ||
| Gold | ||
| HC | ||
| Counter | ||
| 260 | ||
| 225@2V|45@4.5V|38@6V ns | ||
| 0.008 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 0 | ||
| 1 | ||
| 12 | ||
| 1 | ||
| 0 | ||
| 12 | ||
| -40 to 125 °C | ||
| UP Counter | ||
| 16SO | ||
| No | ||
| 16 | ||
| 10 x 4 x 1.45 mm | ||
| 50 pF | ||
| No | ||
| Asynchronous | ||
| SOIC | ||
| No | ||
| Negative-Edge | ||
| Binary | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
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