74HC377D,653
Flip Flop, 74HC377, D, 27 ns, 83 MHz, 5.2 mA, 20 Pins, SOIC
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RoHS 10 Compliant -
Tariff Charges
The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. Input E must be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
? Common clock and master reset ? Eight positive edge-triggered D-type flip-flops ? Complies with JEDEC standard no. 7A ? Input levels: ? For 74HC377: CMOS level ? For 74HCT377: TTL level ? ESD protection: ? HBM JESD22-A114F exceeds 2000 V ? MM JESD22-A115-A exceeds 200 V. ? Multiple package options ? Specified from ?40 ?C to +85 ?C and from ?40 ?C to +125 ?C
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| Gold | ||
| D-Type Bus Interface | ||
| 260 | ||
| -5.2 mA | ||
| 160@2V|32@4.5V|27@6V ns | ||
| 0.008 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| -40 to 125 °C | ||
| 20SO | ||
| 20 | ||
| Non-Inverting | ||
| 13 x 7.6 x 2.45 mm | ||
| 50 pF | ||
| No | ||
| SOIC |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
Factory Lead Time: