74HC374PW,118
Flip Flop, 74HC374, D, 28 ns, 83 MHz, 7.8 mA, 20 Pins, TSSOP
-
RoHS 10 Compliant -
Tariff Charges
The 74HC/HCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT374 are octal D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock (CP) and an output enable input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When output enable is LOW, the contents of the 8 flip-flops are available at the outputs. When output enable is HIGH, the outputs go to the high impedance OFF-state. Operation of the output enable input does not affect the state of the flip-flops. The “374” is functionally identical to the “534”, but has non-inverting outputs.
- 3-state non-inverting outputs for bus oriented applications
- 8-bit positive, edge-triggered register
- Common 3-state output enable input
- Independent register and 3-state buffer operation
- Output capability: bus driver
- ICC category: MSI
Technical Attributes
Find Similar Parts
| Description | Value | |
|---|---|---|
| No | ||
| Single-Ended | ||
| Gold | ||
| HC | ||
| D-Type Bus Interface | ||
| 260 | ||
| -7.8 mA | ||
| 165@2V|33@4.5V|28@6V ns | ||
| 0.008 mA | ||
| Surface Mount | ||
| MSL 1 - Unlimited | ||
| 8 | ||
| 8 | ||
| 8 | ||
| 1 | ||
| 1 | ||
| -40 to 125 °C | ||
| Single-Ended | ||
| 3-State | ||
| 20TSSOP | ||
| 20 | ||
| Non-Inverting | ||
| 6.6 x 4.5 x 0.95 mm | ||
| 50 pF | ||
| No | ||
| TSSOP | ||
| Positive-Edge | ||
| 5 V |
ECCN / UNSPSC / COO
| Description | Value |
|---|---|
| Country of Origin: | RECOVERY FEE |
| ECCN: | EAR99 |
| HTSN: | 8542390050 |
| Schedule B: | 8542390060 |
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